RL050PF130-62B

Pin No.

Symbol

I/O

Description

Note

1

NC

-

No Connect.

2~3

VDD

P

+3.3V Power supply to interface pins

3

GND

P

Power ground pin.

4

NC

-

No Connect.

5

RESET

I

Global reset pin. When GRB is “L”, internal initialization procedure is executed.

6

STB

I

Standby mode(sleep mode),  Active: H

7

GND

P

Power ground pin.

8

RXIN0-

I

Negative LVDS input lane 0

9

RXIN0+

I

Positive LVDS input lane 0

10

GND

P

Power ground pin.

11

RXIN1-

I

Negative LVDS input lane 1

12

RXIN1+

I

Positive LVDS input lane 1

13

GND

P

Power ground pin.

14

RXIN2-

I

Negative LVDS input lane 2

15

RXIN2+

I

Positive LVDS input lane 2

16

GND

P

Power ground pin.

17

RXCLK-

I

Negative LVDS clock input pin

18

RXCLK+

I

Positive LVDS clock input pin

19

GND

P

Power ground pin.

20

RXIN

I

Negative LVDS input lane 3

21

RXIN

I

Positive LVDS input lane 3

22

GND

P

Power ground pin.

23~24

NC

-

No Connect.

25

GND

P

Power ground pin.

26~27

NC

-

No Connect.

28

SELB

I

L: LVDS 3 lane. / H: LVDS 4 lane

1

29

NC

-

No Connect.

30

GND

P

Power ground pin.

31~32

VLED-

P

Backlight LED Cathode

33

SHLR

I

Horizontal scan direction control pin. H: From left to right(Default) right(Default)right(Default)right(Default

34

UPDN

I

Vertical scan direction control pin. H: From up to down(Default)

35~38

NC

-

No Connect.

39~40

VLED+

P

Backlight LED Anode